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<p>CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="core__cm3_8h_source.html">core_cm3.h</a>&quot;</code><br/>
<code>#include &quot;<a class="el" href="system___l_p_c17xx_8h_source.html">system_LPC17xx.h</a>&quot;</code><br/>
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<table class="memberdecls">
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Classes</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___s_c___type_def.html">LPC_SC_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">System Control (SC) register structure definition.  <a href="struct_l_p_c___s_c___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___p_i_n_c_o_n___type_def.html">LPC_PINCON_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pin Connect Block (PINCON) register structure definition.  <a href="struct_l_p_c___p_i_n_c_o_n___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">General Purpose Input/Output (GPIO) register structure definition.  <a href="struct_l_p_c___g_p_i_o___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html">LPC_GPIOINT_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">General Purpose Input/Output interrupt (GPIOINT) register structure definition.  <a href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___t_i_m___type_def.html">LPC_TIM_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer (TIM) register structure definition.  <a href="struct_l_p_c___t_i_m___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___p_w_m___type_def.html">LPC_PWM_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pulse-Width Modulation (PWM) register structure definition.  <a href="struct_l_p_c___p_w_m___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___u_a_r_t___type_def.html">LPC_UART_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Universal Asynchronous Receiver Transmitter (UART) register structure definition.  <a href="struct_l_p_c___u_a_r_t___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___u_a_r_t0___type_def.html">LPC_UART0_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition.  <a href="struct_l_p_c___u_a_r_t0___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___u_a_r_t1___type_def.html">LPC_UART1_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition.  <a href="struct_l_p_c___u_a_r_t1___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___s_p_i___type_def.html">LPC_SPI_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Serial Peripheral Interface (SPI) register structure definition.  <a href="struct_l_p_c___s_p_i___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___s_s_p___type_def.html">LPC_SSP_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Synchronous Serial Communication (SSP) register structure definition.  <a href="struct_l_p_c___s_s_p___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___i2_c___type_def.html">LPC_I2C_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inter-Integrated Circuit (I2C) register structure definition.  <a href="struct_l_p_c___i2_c___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___i2_s___type_def.html">LPC_I2S_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inter IC Sound (I2S) register structure definition.  <a href="struct_l_p_c___i2_s___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___r_i_t___type_def.html">LPC_RIT_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Repetitive Interrupt Timer (RIT) register structure definition.  <a href="struct_l_p_c___r_i_t___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___r_t_c___type_def.html">LPC_RTC_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Real-Time Clock (RTC) register structure definition.  <a href="struct_l_p_c___r_t_c___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___w_d_t___type_def.html">LPC_WDT_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Watchdog Timer (WDT) register structure definition.  <a href="struct_l_p_c___w_d_t___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___a_d_c___type_def.html">LPC_ADC_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Analog-to-Digital Converter (ADC) register structure definition.  <a href="struct_l_p_c___a_d_c___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___d_a_c___type_def.html">LPC_DAC_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Digital-to-Analog Converter (DAC) register structure definition.  <a href="struct_l_p_c___d_a_c___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___m_c_p_w_m___type_def.html">LPC_MCPWM_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Motor Control Pulse-Width Modulation (MCPWM) register structure definition.  <a href="struct_l_p_c___m_c_p_w_m___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___q_e_i___type_def.html">LPC_QEI_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Quadrature Encoder Interface (QEI) register structure definition.  <a href="struct_l_p_c___q_e_i___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html">LPC_CANAF_RAM_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition.  <a href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___c_a_n_a_f___type_def.html">LPC_CANAF_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Controller Area Network Acceptance Filter(CANAF) register structure definition.  <a href="struct_l_p_c___c_a_n_a_f___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___c_a_n_c_r___type_def.html">LPC_CANCR_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Controller Area Network Central (CANCR) register structure definition.  <a href="struct_l_p_c___c_a_n_c_r___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___c_a_n___type_def.html">LPC_CAN_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Controller Area Network Controller (CAN) register structure definition.  <a href="struct_l_p_c___c_a_n___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___g_p_d_m_a___type_def.html">LPC_GPDMA_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">General Purpose Direct Memory Access (GPDMA) register structure definition.  <a href="struct_l_p_c___g_p_d_m_a___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">General Purpose Direct Memory Access Channel (GPDMACH) register structure definition.  <a href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___u_s_b___type_def.html">LPC_USB_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Universal Serial Bus (USB) register structure definition.  <a href="struct_l_p_c___u_s_b___type_def.html#details">More...</a><br/></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_l_p_c___e_m_a_c___type_def.html">LPC_EMAC_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ethernet Media Access Controller (EMAC) register structure definition.  <a href="struct_l_p_c___e_m_a_c___type_def.html#details">More...</a><br/></td></tr>
<tr><td colspan="2"><h2><a name="define-members"></a>
Defines</h2></td></tr>
<tr class="memitem:ga4127d1b31aaf336fab3d7329d117f448"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memitem:gae3fe3587d5100c787e02102ce3944460"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>&#160;&#160;&#160;5</td></tr>
<tr class="memitem:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a>&#160;&#160;&#160;0</td></tr>
<tr class="memitem:ga7d7417b6cd6c6975fa03de03920d27e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga7d7417b6cd6c6975fa03de03920d27e8">LPC_FLASH_BASE</a>&#160;&#160;&#160;(0x00000000UL)</td></tr>
<tr class="memitem:ga9782814ad6434f200b65440d2ac01c2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga9782814ad6434f200b65440d2ac01c2a">LPC_RAM_BASE</a>&#160;&#160;&#160;(0x10000000UL)</td></tr>
<tr class="memitem:ga3364e6e629d92b647ead5b64146ca383"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga3364e6e629d92b647ead5b64146ca383">LPC_AHBRAM0_BASE</a>&#160;&#160;&#160;(0x2007C000UL)</td></tr>
<tr class="memitem:gac4e369c1f5ce40107b7ea38cbd012592"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac4e369c1f5ce40107b7ea38cbd012592">LPC_AHBRAM1_BASE</a>&#160;&#160;&#160;(0x20080000UL)</td></tr>
<tr class="memitem:ga5feb4a6692784a25eaed627661bd8f36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a>&#160;&#160;&#160;(0x2009C000UL)</td></tr>
<tr class="memitem:ga55cab996c3594a0f4cc459ec8e10daea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a>&#160;&#160;&#160;(0x40000000UL)</td></tr>
<tr class="memitem:ga0be6ea6a9e30a53b98bbff6502ea59dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a>&#160;&#160;&#160;(0x40080000UL)</td></tr>
<tr class="memitem:ga8e0d25ffe3428ed27f963e83089046a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>&#160;&#160;&#160;(0x50000000UL)</td></tr>
<tr class="memitem:gaa42e7b1f24aad42d5102e3efcaee6bfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaa42e7b1f24aad42d5102e3efcaee6bfa">LPC_CM3_BASE</a>&#160;&#160;&#160;(0xE0000000UL)</td></tr>
<tr class="memitem:ga02a30b0be4672972c3af9e5aebdcfea1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga02a30b0be4672972c3af9e5aebdcfea1">LPC_WDT_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x00000)</td></tr>
<tr class="memitem:ga1700e34b157bbb09165bb65d63df2032"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga1700e34b157bbb09165bb65d63df2032">LPC_TIM0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x04000)</td></tr>
<tr class="memitem:ga0ea4655a35b46532f1811d8a1cbe66ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga0ea4655a35b46532f1811d8a1cbe66ab">LPC_TIM1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x08000)</td></tr>
<tr class="memitem:gaa96fb70405a1298b350fc6f0ad0af997"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaa96fb70405a1298b350fc6f0ad0af997">LPC_UART0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x0C000)</td></tr>
<tr class="memitem:ga18e8f96b25e3f343bdd7ba552ae7a617"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga18e8f96b25e3f343bdd7ba552ae7a617">LPC_UART1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x10000)</td></tr>
<tr class="memitem:gabb885bd92b4a003b94dc27c4700818bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gabb885bd92b4a003b94dc27c4700818bb">LPC_PWM1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x18000)</td></tr>
<tr class="memitem:gab4476c9e874621194369f74fcf26ce92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gab4476c9e874621194369f74fcf26ce92">LPC_I2C0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x1C000)</td></tr>
<tr class="memitem:gaf611188188574ba805b6de71acc88c6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf611188188574ba805b6de71acc88c6c">LPC_SPI_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x20000)</td></tr>
<tr class="memitem:ga4618213cf968f8245814d7d3e7aa2e2e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga4618213cf968f8245814d7d3e7aa2e2e">LPC_RTC_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x24000)</td></tr>
<tr class="memitem:gadf88491f4b83b5af99eaf30778cb62fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gadf88491f4b83b5af99eaf30778cb62fa">LPC_GPIOINT_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x28080)</td></tr>
<tr class="memitem:gaf4bd6baff731c0a23231ad37e133d705"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf4bd6baff731c0a23231ad37e133d705">LPC_PINCON_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x2C000)</td></tr>
<tr class="memitem:ga05d118997f53f596d3a087f8b91a1969"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga05d118997f53f596d3a087f8b91a1969">LPC_SSP1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x30000)</td></tr>
<tr class="memitem:ga2396e0d0c565e4c1c3b2fc593bd6c37f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga2396e0d0c565e4c1c3b2fc593bd6c37f">LPC_ADC_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x34000)</td></tr>
<tr class="memitem:ga9d4f2bac61e26b32ad64d62f2be50e49"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga9d4f2bac61e26b32ad64d62f2be50e49">LPC_CANAF_RAM_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x38000)</td></tr>
<tr class="memitem:gabc6943f9e943d63ecf4e236b4ce7c344"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gabc6943f9e943d63ecf4e236b4ce7c344">LPC_CANAF_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x3C000)</td></tr>
<tr class="memitem:gac22b88e108d620661add143c174f8f11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac22b88e108d620661add143c174f8f11">LPC_CANCR_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x40000)</td></tr>
<tr class="memitem:gaf2407c1927ebddd767832aefa74c3398"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf2407c1927ebddd767832aefa74c3398">LPC_CAN1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x44000)</td></tr>
<tr class="memitem:gab9608b3b72dd843a25910dd2a809106b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gab9608b3b72dd843a25910dd2a809106b">LPC_CAN2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x48000)</td></tr>
<tr class="memitem:gae59f73cf24ff126be3b9a8b921926676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gae59f73cf24ff126be3b9a8b921926676">LPC_I2C1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">LPC_APB0_BASE</a> + 0x5C000)</td></tr>
<tr class="memitem:ga53fb1af80b541545988f2a966681abfd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga53fb1af80b541545988f2a966681abfd">LPC_SSP0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x08000)</td></tr>
<tr class="memitem:ga3bbaedad584252212d4704bb419489f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga3bbaedad584252212d4704bb419489f6">LPC_DAC_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x0C000)</td></tr>
<tr class="memitem:gaf2375790bfdbe5e09c34321cf20d8bcc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf2375790bfdbe5e09c34321cf20d8bcc">LPC_TIM2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x10000)</td></tr>
<tr class="memitem:ga4a15d8a4becdf0dd64a7e2fc01d9f4d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga4a15d8a4becdf0dd64a7e2fc01d9f4d3">LPC_TIM3_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x14000)</td></tr>
<tr class="memitem:ga8c3873ab74db743465b038c74b365281"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga8c3873ab74db743465b038c74b365281">LPC_UART2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x18000)</td></tr>
<tr class="memitem:gac8dc517d5e03d4ca7666c18c89d5052e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac8dc517d5e03d4ca7666c18c89d5052e">LPC_UART3_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x1C000)</td></tr>
<tr class="memitem:ga00796bd1f1fa200bbffcd9e7e8679eaa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga00796bd1f1fa200bbffcd9e7e8679eaa">LPC_I2C2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x20000)</td></tr>
<tr class="memitem:gacff8b54e3924910d381e6b8ba804050c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gacff8b54e3924910d381e6b8ba804050c">LPC_I2S_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x28000)</td></tr>
<tr class="memitem:ga52453209af89a83df47df77d262d9ab8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga52453209af89a83df47df77d262d9ab8">LPC_RIT_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x30000)</td></tr>
<tr class="memitem:gad8a41dc802e3ea0ba9457d42a6927c03"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gad8a41dc802e3ea0ba9457d42a6927c03">LPC_MCPWM_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x38000)</td></tr>
<tr class="memitem:ga80fa25b18324c10c8e5c26893e6f0a67"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga80fa25b18324c10c8e5c26893e6f0a67">LPC_QEI_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x3C000)</td></tr>
<tr class="memitem:gadb3d235d9617660037e1115ee0ad2c3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gadb3d235d9617660037e1115ee0ad2c3a">LPC_SC_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">LPC_APB1_BASE</a> + 0x7C000)</td></tr>
<tr class="memitem:gaab3f5a2a26c956606a43fc437007aec6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaab3f5a2a26c956606a43fc437007aec6">LPC_EMAC_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x00000)</td></tr>
<tr class="memitem:ga51ba8e3f33730fa2b78be3f892d8c278"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga51ba8e3f33730fa2b78be3f892d8c278">LPC_GPDMA_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04000)</td></tr>
<tr class="memitem:ga08781dde70e77f12630a885aeb555aaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga08781dde70e77f12630a885aeb555aaf">LPC_GPDMACH0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04100)</td></tr>
<tr class="memitem:gafef63f5c3c6c206c3f3295ba3abf303a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gafef63f5c3c6c206c3f3295ba3abf303a">LPC_GPDMACH1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04120)</td></tr>
<tr class="memitem:ga1c607916ebf4fa23ddefd37675366b5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga1c607916ebf4fa23ddefd37675366b5d">LPC_GPDMACH2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04140)</td></tr>
<tr class="memitem:ga85913a69e6267017d35d98b24b9c5aee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga85913a69e6267017d35d98b24b9c5aee">LPC_GPDMACH3_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04160)</td></tr>
<tr class="memitem:ga7daad69ecd947ed94b48e29f2bdbfdaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga7daad69ecd947ed94b48e29f2bdbfdaf">LPC_GPDMACH4_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x04180)</td></tr>
<tr class="memitem:ga20fdee18f2ce4126747d597f98eeb4c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga20fdee18f2ce4126747d597f98eeb4c9">LPC_GPDMACH5_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x041A0)</td></tr>
<tr class="memitem:gab4f5fa13ccc2c91d5d9ef48916e6b34c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gab4f5fa13ccc2c91d5d9ef48916e6b34c">LPC_GPDMACH6_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x041C0)</td></tr>
<tr class="memitem:gaf8515b7ffd05d964f79b0a287f861c9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf8515b7ffd05d964f79b0a287f861c9f">LPC_GPDMACH7_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x041E0)</td></tr>
<tr class="memitem:gaa619008881e9f76dc31131313eff1b79"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaa619008881e9f76dc31131313eff1b79">LPC_USB_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">LPC_AHB_BASE</a>  + 0x0C000)</td></tr>
<tr class="memitem:ga09e0e964ea1abf3b991772df2aa52405"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga09e0e964ea1abf3b991772df2aa52405">LPC_GPIO0_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a> + 0x00000)</td></tr>
<tr class="memitem:ga9fb0536853721a3073bd69d94d0b7ec2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga9fb0536853721a3073bd69d94d0b7ec2">LPC_GPIO1_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a> + 0x00020)</td></tr>
<tr class="memitem:gae5524b2d728167194033ec7a1841a36b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gae5524b2d728167194033ec7a1841a36b">LPC_GPIO2_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a> + 0x00040)</td></tr>
<tr class="memitem:ga56c68c5326b521b3278a35f4d81369a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga56c68c5326b521b3278a35f4d81369a9">LPC_GPIO3_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a> + 0x00060)</td></tr>
<tr class="memitem:gaa54352e7745932e78b56bcbc1d70fa21"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaa54352e7745932e78b56bcbc1d70fa21">LPC_GPIO4_BASE</a>&#160;&#160;&#160;(<a class="el" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">LPC_GPIO_BASE</a> + 0x00080)</td></tr>
<tr class="memitem:gac01c7f61bb84ad209eec22ec5c05446d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac01c7f61bb84ad209eec22ec5c05446d">LPC_SC</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___s_c___type_def.html">LPC_SC_TypeDef</a>        *) <a class="el" href="group___l_p_c17xx___system.html#gadb3d235d9617660037e1115ee0ad2c3a">LPC_SC_BASE</a>       )</td></tr>
<tr class="memitem:ga92f3de6ff5cfd5b8c290696fad07b18a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga92f3de6ff5cfd5b8c290696fad07b18a">LPC_GPIO0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#ga09e0e964ea1abf3b991772df2aa52405">LPC_GPIO0_BASE</a>    )</td></tr>
<tr class="memitem:ga335587dad4e6d0da56c1f3ad1c087d10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga335587dad4e6d0da56c1f3ad1c087d10">LPC_GPIO1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#ga9fb0536853721a3073bd69d94d0b7ec2">LPC_GPIO1_BASE</a>    )</td></tr>
<tr class="memitem:ga27a09e8c08f9e209c6af70b0a3c56b39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga27a09e8c08f9e209c6af70b0a3c56b39">LPC_GPIO2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#gae5524b2d728167194033ec7a1841a36b">LPC_GPIO2_BASE</a>    )</td></tr>
<tr class="memitem:ga6e961eb01d0f1e61dd9b9d5979d2aafc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6e961eb01d0f1e61dd9b9d5979d2aafc">LPC_GPIO3</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#ga56c68c5326b521b3278a35f4d81369a9">LPC_GPIO3_BASE</a>    )</td></tr>
<tr class="memitem:ga652a560a972d4edec8a67cd85ad4bd60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga652a560a972d4edec8a67cd85ad4bd60">LPC_GPIO4</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o___type_def.html">LPC_GPIO_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#gaa54352e7745932e78b56bcbc1d70fa21">LPC_GPIO4_BASE</a>    )</td></tr>
<tr class="memitem:ga7d68cf0829652bd8c1f837c697653c5f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga7d68cf0829652bd8c1f837c697653c5f">LPC_WDT</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___w_d_t___type_def.html">LPC_WDT_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga02a30b0be4672972c3af9e5aebdcfea1">LPC_WDT_BASE</a>      )</td></tr>
<tr class="memitem:ga6002a8a8684b782ae7345834f6dcbf36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6002a8a8684b782ae7345834f6dcbf36">LPC_TIM0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___t_i_m___type_def.html">LPC_TIM_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga1700e34b157bbb09165bb65d63df2032">LPC_TIM0_BASE</a>     )</td></tr>
<tr class="memitem:ga01fc9c608a87fe135cbe8799a3908119"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga01fc9c608a87fe135cbe8799a3908119">LPC_TIM1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___t_i_m___type_def.html">LPC_TIM_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga0ea4655a35b46532f1811d8a1cbe66ab">LPC_TIM1_BASE</a>     )</td></tr>
<tr class="memitem:ga459250a0031a3c6c45d033faf8a7a39a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga459250a0031a3c6c45d033faf8a7a39a">LPC_TIM2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___t_i_m___type_def.html">LPC_TIM_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gaf2375790bfdbe5e09c34321cf20d8bcc">LPC_TIM2_BASE</a>     )</td></tr>
<tr class="memitem:ga12f449e7f05cf8ab3f066cf490335a87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga12f449e7f05cf8ab3f066cf490335a87">LPC_TIM3</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___t_i_m___type_def.html">LPC_TIM_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga4a15d8a4becdf0dd64a7e2fc01d9f4d3">LPC_TIM3_BASE</a>     )</td></tr>
<tr class="memitem:gafdf2cd2149b37f8021a1c19191f8ec50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gafdf2cd2149b37f8021a1c19191f8ec50">LPC_RIT</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___r_i_t___type_def.html">LPC_RIT_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga52453209af89a83df47df77d262d9ab8">LPC_RIT_BASE</a>      )</td></tr>
<tr class="memitem:ga6ba29f0f9b8af2f72e303533185bcc82"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6ba29f0f9b8af2f72e303533185bcc82">LPC_UART0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___u_a_r_t___type_def.html">LPC_UART_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#gaa96fb70405a1298b350fc6f0ad0af997">LPC_UART0_BASE</a>    )</td></tr>
<tr class="memitem:ga83ea0dab4dcb7411c2e1de20050a4d2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga83ea0dab4dcb7411c2e1de20050a4d2d">LPC_UART1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___u_a_r_t1___type_def.html">LPC_UART1_TypeDef</a>     *) <a class="el" href="group___l_p_c17xx___system.html#ga18e8f96b25e3f343bdd7ba552ae7a617">LPC_UART1_BASE</a>    )</td></tr>
<tr class="memitem:gac8badf231948fc9216d416c71a34e924"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac8badf231948fc9216d416c71a34e924">LPC_UART2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___u_a_r_t___type_def.html">LPC_UART_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#ga8c3873ab74db743465b038c74b365281">LPC_UART2_BASE</a>    )</td></tr>
<tr class="memitem:ga61c2bf57d66b50108cdec6878f9e8ee5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga61c2bf57d66b50108cdec6878f9e8ee5">LPC_UART3</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___u_a_r_t___type_def.html">LPC_UART_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#gac8dc517d5e03d4ca7666c18c89d5052e">LPC_UART3_BASE</a>    )</td></tr>
<tr class="memitem:ga6e400c5c011db85f452eb2fb4a1ee7c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6e400c5c011db85f452eb2fb4a1ee7c2">LPC_PWM1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___p_w_m___type_def.html">LPC_PWM_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gabb885bd92b4a003b94dc27c4700818bb">LPC_PWM1_BASE</a>     )</td></tr>
<tr class="memitem:ga14b6c56857e970a682a9bb22a0cb6716"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga14b6c56857e970a682a9bb22a0cb6716">LPC_I2C0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___i2_c___type_def.html">LPC_I2C_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gab4476c9e874621194369f74fcf26ce92">LPC_I2C0_BASE</a>     )</td></tr>
<tr class="memitem:gad6d6333e47875813be171cffef258837"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gad6d6333e47875813be171cffef258837">LPC_I2C1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___i2_c___type_def.html">LPC_I2C_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gae59f73cf24ff126be3b9a8b921926676">LPC_I2C1_BASE</a>     )</td></tr>
<tr class="memitem:ga6bcdaa0ab66f4e3d213a488b34055557"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6bcdaa0ab66f4e3d213a488b34055557">LPC_I2C2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___i2_c___type_def.html">LPC_I2C_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga00796bd1f1fa200bbffcd9e7e8679eaa">LPC_I2C2_BASE</a>     )</td></tr>
<tr class="memitem:ga1d2800cab1a50bdf99efe66d6028b663"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga1d2800cab1a50bdf99efe66d6028b663">LPC_I2S</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___i2_s___type_def.html">LPC_I2S_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gacff8b54e3924910d381e6b8ba804050c">LPC_I2S_BASE</a>      )</td></tr>
<tr class="memitem:ga9b593f008d0061052e90a8865d702ce5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga9b593f008d0061052e90a8865d702ce5">LPC_SPI</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___s_p_i___type_def.html">LPC_SPI_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gaf611188188574ba805b6de71acc88c6c">LPC_SPI_BASE</a>      )</td></tr>
<tr class="memitem:ga8303d3e5135b2a039f0dc5f93c194f78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga8303d3e5135b2a039f0dc5f93c194f78">LPC_RTC</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___r_t_c___type_def.html">LPC_RTC_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga4618213cf968f8245814d7d3e7aa2e2e">LPC_RTC_BASE</a>      )</td></tr>
<tr class="memitem:gaefe2f52407c1ce58395766dc760525b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaefe2f52407c1ce58395766dc760525b5">LPC_GPIOINT</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html">LPC_GPIOINT_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#gadf88491f4b83b5af99eaf30778cb62fa">LPC_GPIOINT_BASE</a>  )</td></tr>
<tr class="memitem:gae30bef900c4cccded0c66548b38591f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gae30bef900c4cccded0c66548b38591f9">LPC_PINCON</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___p_i_n_c_o_n___type_def.html">LPC_PINCON_TypeDef</a>    *) <a class="el" href="group___l_p_c17xx___system.html#gaf4bd6baff731c0a23231ad37e133d705">LPC_PINCON_BASE</a>   )</td></tr>
<tr class="memitem:gac213e0325a8e8a972bd2e0dd6ccf353c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac213e0325a8e8a972bd2e0dd6ccf353c">LPC_SSP0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___s_s_p___type_def.html">LPC_SSP_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga53fb1af80b541545988f2a966681abfd">LPC_SSP0_BASE</a>     )</td></tr>
<tr class="memitem:ga09c4610ada1d9aa18913963cbd1a6e52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga09c4610ada1d9aa18913963cbd1a6e52">LPC_SSP1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___s_s_p___type_def.html">LPC_SSP_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga05d118997f53f596d3a087f8b91a1969">LPC_SSP1_BASE</a>     )</td></tr>
<tr class="memitem:gab6eaf639d3a1eec83583a9e11ab7336f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gab6eaf639d3a1eec83583a9e11ab7336f">LPC_ADC</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___a_d_c___type_def.html">LPC_ADC_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga2396e0d0c565e4c1c3b2fc593bd6c37f">LPC_ADC_BASE</a>      )</td></tr>
<tr class="memitem:ga5b94918e9ea326d84ab862a5d377903b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga5b94918e9ea326d84ab862a5d377903b">LPC_DAC</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___d_a_c___type_def.html">LPC_DAC_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga3bbaedad584252212d4704bb419489f6">LPC_DAC_BASE</a>      )</td></tr>
<tr class="memitem:gaf02b7bcdc41a045910b3f0bae8a8f4b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf02b7bcdc41a045910b3f0bae8a8f4b0">LPC_CANAF_RAM</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html">LPC_CANAF_RAM_TypeDef</a> *) <a class="el" href="group___l_p_c17xx___system.html#ga9d4f2bac61e26b32ad64d62f2be50e49">LPC_CANAF_RAM_BASE</a>)</td></tr>
<tr class="memitem:ga4f738c971938302f38d54e662c9f7774"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga4f738c971938302f38d54e662c9f7774">LPC_CANAF</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___c_a_n_a_f___type_def.html">LPC_CANAF_TypeDef</a>     *) <a class="el" href="group___l_p_c17xx___system.html#gabc6943f9e943d63ecf4e236b4ce7c344">LPC_CANAF_BASE</a>    )</td></tr>
<tr class="memitem:gadc209557a5736e29149b96018056fc29"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gadc209557a5736e29149b96018056fc29">LPC_CANCR</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___c_a_n_c_r___type_def.html">LPC_CANCR_TypeDef</a>     *) <a class="el" href="group___l_p_c17xx___system.html#gac22b88e108d620661add143c174f8f11">LPC_CANCR_BASE</a>    )</td></tr>
<tr class="memitem:ga2f006d6888921f8336dce504eb56f4aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga2f006d6888921f8336dce504eb56f4aa">LPC_CAN1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___c_a_n___type_def.html">LPC_CAN_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gaf2407c1927ebddd767832aefa74c3398">LPC_CAN1_BASE</a>     )</td></tr>
<tr class="memitem:ga838776140ad5e0156715278f8bb0652d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga838776140ad5e0156715278f8bb0652d">LPC_CAN2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___c_a_n___type_def.html">LPC_CAN_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gab9608b3b72dd843a25910dd2a809106b">LPC_CAN2_BASE</a>     )</td></tr>
<tr class="memitem:ga6fe8e415821195a786b3f0dc5e7fc9fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga6fe8e415821195a786b3f0dc5e7fc9fa">LPC_MCPWM</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___m_c_p_w_m___type_def.html">LPC_MCPWM_TypeDef</a>     *) <a class="el" href="group___l_p_c17xx___system.html#gad8a41dc802e3ea0ba9457d42a6927c03">LPC_MCPWM_BASE</a>    )</td></tr>
<tr class="memitem:ga71347b58898f54f8e9f00a6c652c7d49"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga71347b58898f54f8e9f00a6c652c7d49">LPC_QEI</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___q_e_i___type_def.html">LPC_QEI_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#ga80fa25b18324c10c8e5c26893e6f0a67">LPC_QEI_BASE</a>      )</td></tr>
<tr class="memitem:ga75e74c74e4b52e53d56b9e13be2bc5b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga75e74c74e4b52e53d56b9e13be2bc5b5">LPC_EMAC</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___e_m_a_c___type_def.html">LPC_EMAC_TypeDef</a>      *) <a class="el" href="group___l_p_c17xx___system.html#gaab3f5a2a26c956606a43fc437007aec6">LPC_EMAC_BASE</a>     )</td></tr>
<tr class="memitem:gaf9d4b843ddff8d08a27880f90e2dbf18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaf9d4b843ddff8d08a27880f90e2dbf18">LPC_GPDMA</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a___type_def.html">LPC_GPDMA_TypeDef</a>     *) <a class="el" href="group___l_p_c17xx___system.html#ga51ba8e3f33730fa2b78be3f892d8c278">LPC_GPDMA_BASE</a>    )</td></tr>
<tr class="memitem:ga026df42ac9515b2f8271e562a4d4f3ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga026df42ac9515b2f8271e562a4d4f3ba">DMAREQSEL</a>&#160;&#160;&#160;(*(<a class="el" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t *)  ( 0x4000C1C4))</td></tr>
<tr class="memitem:ga1faf7af762ef1c89d7c9cca935fbfdb6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga1faf7af762ef1c89d7c9cca935fbfdb6">LPC_GPDMACH0</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#ga08781dde70e77f12630a885aeb555aaf">LPC_GPDMACH0_BASE</a> )</td></tr>
<tr class="memitem:ga663e789f3e8396669882e7d338116a87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga663e789f3e8396669882e7d338116a87">LPC_GPDMACH1</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#gafef63f5c3c6c206c3f3295ba3abf303a">LPC_GPDMACH1_BASE</a> )</td></tr>
<tr class="memitem:ga10facbb9af335faa6898e205715fe91a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga10facbb9af335faa6898e205715fe91a">LPC_GPDMACH2</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#ga1c607916ebf4fa23ddefd37675366b5d">LPC_GPDMACH2_BASE</a> )</td></tr>
<tr class="memitem:gaa4f54bce7705a81c84a357cbfc4757ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gaa4f54bce7705a81c84a357cbfc4757ed">LPC_GPDMACH3</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#ga85913a69e6267017d35d98b24b9c5aee">LPC_GPDMACH3_BASE</a> )</td></tr>
<tr class="memitem:ga8571e9cf7175bae6faf7963a271f48d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga8571e9cf7175bae6faf7963a271f48d4">LPC_GPDMACH4</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#ga7daad69ecd947ed94b48e29f2bdbfdaf">LPC_GPDMACH4_BASE</a> )</td></tr>
<tr class="memitem:ga3037ac33f3f1cbfaa0623bd73085bd37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga3037ac33f3f1cbfaa0623bd73085bd37">LPC_GPDMACH5</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#ga20fdee18f2ce4126747d597f98eeb4c9">LPC_GPDMACH5_BASE</a> )</td></tr>
<tr class="memitem:gafe18efb195eb0e8bf265b97bb4520848"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gafe18efb195eb0e8bf265b97bb4520848">LPC_GPDMACH6</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#gab4f5fa13ccc2c91d5d9ef48916e6b34c">LPC_GPDMACH6_BASE</a> )</td></tr>
<tr class="memitem:ga53536fc136007bcb4dd9e9a0257bf4fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga53536fc136007bcb4dd9e9a0257bf4fa">LPC_GPDMACH7</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">LPC_GPDMACH_TypeDef</a>   *) <a class="el" href="group___l_p_c17xx___system.html#gaf8515b7ffd05d964f79b0a287f861c9f">LPC_GPDMACH7_BASE</a> )</td></tr>
<tr class="memitem:gae77538a7f3f4850715c95283e38b423f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gae77538a7f3f4850715c95283e38b423f">LPC_USB</a>&#160;&#160;&#160;((<a class="el" href="struct_l_p_c___u_s_b___type_def.html">LPC_USB_TypeDef</a>       *) <a class="el" href="group___l_p_c17xx___system.html#gaa619008881e9f76dc31131313eff1b79">LPC_USB_BASE</a>      )</td></tr>
<tr><td colspan="2"><h2><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gac3af4a32370fb28c4ade8bf2add80251"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="group___l_p_c17xx___system.html#ga666eb0caeb12ec0e281415592ae89083">IRQn</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#gac3af4a32370fb28c4ade8bf2add80251">IRQn_Type</a></td></tr>
<tr class="memdesc:gac3af4a32370fb28c4ade8bf2add80251"><td class="mdescLeft">&#160;</td><td class="mdescRight">IRQ interrupt source definition.  <a href="group___l_p_c17xx___system.html#gac3af4a32370fb28c4ade8bf2add80251"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga666eb0caeb12ec0e281415592ae89083"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___l_p_c17xx___system.html#ga666eb0caeb12ec0e281415592ae89083">IRQn</a> { <br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a> =  -14, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a33ff1cf7098de65d61b6354fee6cd5aa">MemoryManagement_IRQn</a> =  -12, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8693500eff174f16119e96234fee73af">BusFault_IRQn</a> =  -11, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6895237c9443601ac832efa635dd8bbf">UsageFault_IRQn</a> =  -10, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a> =  -5, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8e033fcef7aed98a31c60a7de206722c">DebugMonitor_IRQn</a> =  -4, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a> =  -2, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a> =  -1, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a78573b84a4133ef5812b33ce10dcba12">WDT_IRQn</a> =  0, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a2336220ce1e39507eb592958064a2b87">TIMER0_IRQn</a> =  1, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0b751a83bbf254701e0d5a1d863010d9">TIMER1_IRQn</a> =  2, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad97a34027a8b1017d42d1d6320381e48">TIMER2_IRQn</a> =  3, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7d15b5c33e51350d11303db7d4bc3381">TIMER3_IRQn</a> =  4, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ae9122b85b58f7c24033a8515615a7b74">UART0_IRQn</a> =  5, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a9650ab92e46bc16f333d4c63ad0459b4">UART1_IRQn</a> =  6, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ab051fac6b15b88454713bb36d96e5dd5">UART2_IRQn</a> =  7, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a11614a227a56dc01859bf803013e6358">UART3_IRQn</a> =  8, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0cd5b403aa037bacf964fd1a60c3f08f">PWM1_IRQn</a> =  9, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f1945c7372a6de732306ea3801c8e2a">I2C0_IRQn</a> =  10, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af651b1769e03e4653b1a4a7c88132398">I2C1_IRQn</a> =  11, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0e9ff46d0a6311ca3cc43a71702d638d">I2C2_IRQn</a> =  12, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8f5f99956cf9765f17bcba6865b93ce2">SPI_IRQn</a> =  13, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6c8d6262fd7ecedc57b2fe9209be9765">SSP0_IRQn</a> =  14, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0cfa46f0d13c2de0f3e826c10a789">SSP1_IRQn</a> =  15, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7726163ff47c899c26ce68f99eb937a9">PLL0_IRQn</a> =  16, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0f2770f7f57f75fac3d8bcac0e858">RTC_IRQn</a> =  17, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0a3db3233549f012f8ecb88f0510adcf">EINT0_IRQn</a> =  18, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad855ae101e21a04054a9844066900d7c">EINT1_IRQn</a> =  19, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a40ab356422a691418668d6bbfd9f17b9">EINT2_IRQn</a> =  20, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a14098dd2e0d0331c1e5f1f80dde14371">EINT3_IRQn</a> =  21, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4d69175258ae261dd545001e810421b3">ADC_IRQn</a> =  22, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ac2ee5960aed41ff349aa7a86c37e9ab2">BOD_IRQn</a> =  23, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a5078f46ddc47f29eae4aa40bd57d1692">USB_IRQn</a> =  24, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a20d0bdfa1654b723493895e3ea617cdb">CAN_IRQn</a> =  25, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4968eb85558b7cd25e0f0fa1b839f881">DMA_IRQn</a> =  26, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a133fe4eabad3ed7b1959daddaace94b3">I2S_IRQn</a> =  27, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af3a2a999d58e47ed39ed1bd9c877aee6">ENET_IRQn</a> =  28, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a075f80f900f31c166defe2a4aef99e77">RIT_IRQn</a> =  29, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a66a11398b7cc13d7c525945b0a86a2f0">MCPWM_IRQn</a> =  30, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a82471ba65527ad3f3da8af38acb953bf">QEI_IRQn</a> =  31, 
<br/>
&#160;&#160;<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f0e46a33c20be148ef16fe7ed4dcd4b">PLL1_IRQn</a> =  32, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083aa3c495fabd97a50818dc748f738c71e7">USBActivity_IRQn</a> =  33, 
<a class="el" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a25ef61f3d4a0d5f2bcf0525702b872b7">CANActivity_IRQn</a> =  34
<br/>
 }</td></tr>
<tr class="memdesc:ga666eb0caeb12ec0e281415592ae89083"><td class="mdescLeft">&#160;</td><td class="mdescRight">IRQ interrupt source definition.  <a href="group___l_p_c17xx___system.html#ga666eb0caeb12ec0e281415592ae89083">More...</a><br/></td></tr>
</table>
<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series. </p>
<dl class="section version"><dt>Version:</dt><dd>: V1.08 </dd></dl>
<dl class="section date"><dt>Date:</dt><dd>: 21. December 2009</dd></dl>
<dl class="section note"><dt>Note:</dt><dd>Copyright (C) 2009 ARM Limited. All rights reserved.</dd></dl>
<dl class="section user"><dt></b></dt><dd>ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.</dd></dl>
<dl class="section user"><dt></b></dt><dd>THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. </dd></dl>
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